cessing and the RF/microwave front
end (including the antenna). Figure 6
shows a high level block diagram of an
active radar system.
Digital Signal Processing
Thanks to widely available commercial processors, embedded processors, field programmable gate arrays (FPGA), digital signal processors
(DSP) and, more recently, graphics
processing units (GPU), radar signal processing engineers now have a
breadth of platforms to choose from.
The choice largely depends on the
type of signal processing that is needed
and the cost of implementation. General purpose, personal computer, type
hardware may be sufficient for radar
systems with relatively low throughput and simple signal processing requirements. An FPGA or GPU based
processor might be needed if large
parallel processing is needed. In this
case, however, the cost of the hardware increases substantially. In most
platforms, pulse generation and receiver algorithms can be implemented with appropriate software bringing
benefits such as programmability and
reuse of intellectual property. At the
same time, radar signal processing engineers are faced with the challenge of
incorporating more and more sophisticated algorithms, consuming longer
simulation times within the system
and exhausting the available computational resources.
Pulse compression is a technique
used to improve range resolution and
RF and microwave
and CMOS), and
advances in device
GaAs, SiGe and
high electron mobil-
ity transistor varia-
Without loss of
active radar system
design can be broken into two major
baseband signal pro-
Fig. 4 Example LFM waveform where a pulse ramps from high frequency to low and back again.
0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600
LFM IN-PHASE LINEAR FREQUENCY MODULATED PULSE LFM QUADRATURE
Fig. 5 Spectrogram of LFM showing the instantaneous frequency
Fig. 6 General radar block diagram.
Fig. 3 Spectrogram of a SFM waveform showing the instantaneous frequency over time.