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terminal to give it solder plate at-
tributes of five percent lead content.
This is achieved by adding lead to the
pure-tin plating. Furthermore, the
lead must be evenly distributed in the
entire pure-tin plated area which is
accomplished through a low tempera-
ture fusion process that melts the tin
and tin-lead and homogenizes the two
layers into a monolithic tin-lead layer.
Figure 2 shows scanning electron
microscope (SEM) cross-sectional pic-
tures of a typical terminal of a ceramic
electronic chip component. Under
back-scatter scans in the SEM, lead
particles are white and tin is the lightest
gray and outer-most layer to the right.
shock which can lead to crack-
ing and de-lamination. Robotic
handling improves precise dip-
ping angle and travel. However,
it is very difficult to dip inside the
meniscus at the lead egress points
of leaded devices, which increases
the chance of potential tin whisker
growth in these areas. Additionally,
dipping of chip components intro-
duces the risk of thermal shock and
terminal coverage variation.
• SMT chip size active or passive devices:
Pure-tin plated chip-size devices
are too small and not practical
to dip in tin-lead solder. To do so
would risk the chance of thermal
shock and present handling problems during dipping especially for
small case sizes such as 01005 and
0201. The ideal mitigation would
convert pure-tin into the previously
universally used “solder plate” with
at least three percent lead content.
The concept behind the fusion
process is to treat the pure-tin plated
tories for Energy Dispersion, X-ray
Spectroscopy (EDXS) using the same
principle as XRF. Mostly, inspectors
look for a minimum three percent
lead content, the level commonly
found in formerly ubiquitous tin-lead
Blanket prohibition of pure-tin
plate is currently practiced where the
offered electronic equipment is to be
“fail safe.” This includes industries in
the satellite, space exploration, medi-
cal devices, missiles and other high-
technology weapons or where life
and limb are at risk. However, blan-
ket prohibition is possible only when
other acceptable plating or mitigation
methods are still available (or where
re-designs are possible to use alterna-
tive components that are still available
Tin whisker mitigation of electronic
components can be divided into two main
categories, leaded and un-leaded surface
mount technology (SMT) devices.
• Leaded active or passive devices:
Pure-tin leaded devices can be
dipped in standard tin-lead solder.
Preheating can prevent thermal
Fig. 2 SEM photo of historic industry
baseline solder plate, ~3% lead (a), pure-tin
plate, (b) and fusion processed for tin whisker mitigation, 5%+ lead (c).